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Up to four boards side by side: chip, logic, toolchains, interfaces and price.

AttributeZCU102 Evaluation KitEMC2-ZU2CGTang Mega 60K Dock
FPGAXCZU9EG-2FFVB1156EXCZU2CG-1SFVC784IGW5AT-LV60PG484AC1/I0
FamilyZynq UltraScale+ MPSoCZynq UltraScale+ MPSoCGW5A
Logic (LUTs)not listednot listed59904
Priceat the sellerat the sellerat the seller
Open toolchainnonono
ToolchainsVivado + Vitis + PetaLinuxAMD VivadoGowin EDA, LiteX (litex-boards sipeed_tang_mega_60k), openFPGALoader (GW5AT-60)
InterfacesEthernet, SFP+, HDMI, PCIePCIe, Ethernet, HDMI_OUTPCIe 2.0 card-edge (x1 mode only at present), USB 3.0 (CH569, 5 Gbps), Gigabit Ethernet, HDMI/DVI (TX and RX), SD slot (1-bit SDIO/MMC or SPI), USB JTAG, USB UART, Differential ADC channels
MemoryDDR4 requires AMD user guide verificationnot listedDDR3 4 Gbit (512 MB), Onboard flash 64 Mbit
LevelProfessionalIntermediateProfessional
Where to get helpAMD Adaptive Computing forumsofficial docsSipeed forum, r/GowinFPGA
Known issuesTool and IP licensing can dominate project feasibility—PCIe works in x1 mode only; Minimum Gowin IDE version; 3.3 V I/O limit

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