Compare boards
Up to four boards side by side: chip, logic, toolchains, interfaces and price.
| Attribute | ZCU102 Evaluation Kit | EMC2-ZU5EV | TE0890 | Tang Mega 60K Dock |
|---|---|---|---|---|
| FPGA | XCZU9EG-2FFVB1156E | XCZU5EV-1SFVC784I | XC7S25-1FTGB196C | GW5AT-LV60PG484AC1/I0 |
| Family | Zynq UltraScale+ MPSoC | Zynq UltraScale+ MPSoC | Spartan-7 | GW5A |
| Logic (LUTs) | not listed | not listed | not listed | 59904 |
| Price | at the seller | at the seller | at the seller | at the seller |
| Open toolchain | no | no | Project X-Ray / openXC7 | no |
| Toolchains | Vivado + Vitis + PetaLinux | AMD Vivado | AMD Vivado, Project X-Ray / openXC7 | Gowin EDA, LiteX (litex-boards sipeed_tang_mega_60k), openFPGALoader (GW5AT-60) |
| Interfaces | Ethernet, SFP+, HDMI, PCIe | PCIe, Ethernet, HDMI_OUT | not listed | PCIe 2.0 card-edge (x1 mode only at present), USB 3.0 (CH569, 5 Gbps), Gigabit Ethernet, HDMI/DVI (TX and RX), SD slot (1-bit SDIO/MMC or SPI), USB JTAG, USB UART, Differential ADC channels |
| Memory | DDR4 requires AMD user guide verification | not listed | not listed | DDR3 4 Gbit (512 MB), Onboard flash 64 Mbit |
| Level | Professional | Intermediate | Intermediate | Professional |
| Where to get help | AMD Adaptive Computing forums | official docs | official docs | Sipeed forum, r/GowinFPGA |
| Known issues | Tool and IP licensing can dominate project feasibility | — | — | PCIe works in x1 mode only; Minimum Gowin IDE version; 3.3 V I/O limit |