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Up to four boards side by side: chip, logic, toolchains, interfaces and price.

AttributePolarFire SoC Icicle KitTang Mega 60K DockECP5 Versa Development Kit
FPGAMPFS250TGW5AT-LV60PG484AC1/I0LFE5UM-45F
FamilyPolarFire SoCGW5AECP5
Logic (LUTs)not listed59904not listed
Priceat the sellerat the sellerat the seller
Open toolchainnonoProject Trellis
ToolchainsLibero SoCGowin EDA, LiteX (litex-boards sipeed_tang_mega_60k), openFPGALoader (GW5AT-60)Lattice Diamond, Yosys + nextpnr + Project Trellis
InterfacesEthernet, USBPCIe 2.0 card-edge (x1 mode only at present), USB 3.0 (CH569, 5 Gbps), Gigabit Ethernet, HDMI/DVI (TX and RX), SD slot (1-bit SDIO/MMC or SPI), USB JTAG, USB UART, Differential ADC channelsEthernet, PCIe
MemoryDDR4 requires Microchip docs verificationDDR3 4 Gbit (512 MB), Onboard flash 64 Mbitnot listed
LevelProfessionalProfessionalProfessional
Where to get helpMicrochip forumsSipeed forum, r/GowinFPGAYosysHQ open-source tooling
Known issues—PCIe works in x1 mode only; Minimum Gowin IDE version; 3.3 V I/O limit—

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