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Up to four boards side by side: chip, logic, toolchains, interfaces and price.

AttributeTang Mega 60K DockEMC2-MPFS250ECP5 Versa Development KitGW1N-9 Starter Kit
FPGAGW5AT-LV60PG484AC1/I0MPFS250T-FCVG484ELFE5UM-45FGW1N-LV9EQ144C6I5
FamilyGW5APolarFire SoCECP5GW1N
Logic (LUTs)59904not listednot listednot listed
Priceat the sellerat the sellerat the sellerat the seller
Open toolchainnonoProject TrellisProject Apicula
ToolchainsGowin EDA, LiteX (litex-boards sipeed_tang_mega_60k), openFPGALoader (GW5AT-60)Libero SoCLattice Diamond, Yosys + nextpnr + Project TrellisGowin EDA, Project Apicula
InterfacesPCIe 2.0 card-edge (x1 mode only at present), USB 3.0 (CH569, 5 Gbps), Gigabit Ethernet, HDMI/DVI (TX and RX), SD slot (1-bit SDIO/MMC or SPI), USB JTAG, USB UART, Differential ADC channelsPCIe, Ethernet, HDMI_OUTEthernet, PCIeMIPI_CSI
MemoryDDR3 4 Gbit (512 MB), Onboard flash 64 Mbitnot listednot listednot listed
LevelProfessionalIntermediateProfessionalIntermediate
Where to get helpSipeed forum, r/GowinFPGAofficial docsYosysHQ open-source toolingofficial docs
Known issuesPCIe works in x1 mode only; Minimum Gowin IDE version; 3.3 V I/O limit———