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Up to four boards side by side: chip, logic, toolchains, interfaces and price.

AttributeTang Mega 60K DockMicroZedEMC2-ZU5EV
FPGAGW5AT-LV60PG484AC1/I0XC7Z010-1CLG400CXCZU5EV-1SFVC784I
FamilyGW5AZynq-7000Zynq UltraScale+ MPSoC
Logic (LUTs)59904not listednot listed
Priceat the sellerat the sellerat the seller
Open toolchainnoProject X-Ray / openXC7no
ToolchainsGowin EDA, LiteX (litex-boards sipeed_tang_mega_60k), openFPGALoader (GW5AT-60)AMD Vivado, Project X-Ray / openXC7AMD Vivado
InterfacesPCIe 2.0 card-edge (x1 mode only at present), USB 3.0 (CH569, 5 Gbps), Gigabit Ethernet, HDMI/DVI (TX and RX), SD slot (1-bit SDIO/MMC or SPI), USB JTAG, USB UART, Differential ADC channelsEthernetPCIe, Ethernet, HDMI_OUT
MemoryDDR3 4 Gbit (512 MB), Onboard flash 64 Mbitnot listednot listed
LevelProfessionalIntermediateIntermediate
Where to get helpSipeed forum, r/GowinFPGAofficial docsofficial docs
Known issuesPCIe works in x1 mode only; Minimum Gowin IDE version; 3.3 V I/O limit——

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