Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributecdc_utilsverilog-axiverilog-axistaxi
MaturityM1 · PrototypeM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseNo license foundMIT · Commercial-friendlyMIT · Commercial-friendlyCERN-OHL-S-2.0 · Copyleft
Language————
Tests—yesyesyes
CI—yesyesyes
Formal————
FuseSoC————
Activity—updated 2 years agoupdated 2 years agoupdated 40 days ago
Boards————
Interfaces—AXIFIFO/stream, AXIFIFO/stream, AXI
CategoryBuses and infrastructureBuses and infrastructureBuses and infrastructureBuses and infrastructure