Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeLiteSDCardwb_ramLiteDRAMLiteHyperBus
MaturityM2 · Simulation-testedM1 · PrototypeM2 · Simulation-testedM1 · Prototype
LicenseNo license foundNo license foundNo license foundNo license found
LanguageMigen/Python/Verilog—Migen/Python/Verilog—
Testsyes—yes—
CIyes—yes—
Formal————
FuseSoC————
Activityupdated 1 day ago—updated 1 day ago—
Boards————
InterfacesSD/SDIOMemory, WishboneMemoryMemory
CategoryMemory and storageMemory and storageMemory and storageMemory and storage