Compare cores
Up to four cores side by side: maturity, license, tests and activity.
| Attribute | opencores pwm | OpenTitan UART IP | OpenTitan I2C IP |
|---|---|---|---|
| Maturity | M1 · Prototype | M4 · Production-ready | M4 · Production-ready |
| License | No license found | Apache-2.0 · Commercial-friendly | Apache-2.0 · Commercial-friendly |
| Language | Verilog/VHDL unknown until review | — | — |
| Tests | — | yes | yes |
| CI | — | yes | yes |
| Formal | — | — | — |
| FuseSoC | — | yes | yes |
| Activity | — | updated 1 day ago | updated 1 day ago |
| Boards | — | — | — |
| Interfaces | PWM | UART | I2C |
| Category | Interfaces and peripherals | Interfaces and peripherals | Interfaces and peripherals |