The license requires manual review.
opencores gpio
GPIO category seed.
Buses and infrastructureVerilog/VHDL unknown until reviewNo license foundM1 · Prototype
Worth knowing
Manual review is required.
Facts
The source is not on GitHub — an editor checks tests and license manually.
- Maturity
- M1 · Prototype
- License
- No license found
- Tests
- not found
- CI
- not found
- Formal verification
- not found
- FuseSoC
- not found
Source exists, but no tests were found. How maturity is assigned
Purpose
Boards
No one has confirmed a board run yet.
Add evidenceSources
- opencores gpio source · 2026-04-30
How to check it locally
No reproducible command known. Help add one.
Scores and how they are computed
License, tests, CI, formal checks, documentation and activity come from the repository check. Usefulness and learning value are editorial estimates.
Similar cores
OpenTitan prim library
Checked on GitHubPrimitive library reference.
Buses and infrastructureApache-2.0M4 · Production-readyupdated 1 day ago
wb_intercon
Checked on GitHubCommon Wishbone interconnect package.
Buses and infrastructureISCM2 · Simulation-testedupdated 8 months ago
verilog-axi
Checked on GitHubAXI component library and comparison source.
Buses and infrastructureMITM2 · Simulation-testedupdated 2 years ago