The license requires manual review.
OpenCores UART16550
Canonical UART reference and common FuseSoC adaptations.
Interfaces and peripheralsVerilogNo license foundM1 · Prototype
Worth knowing
The source appears stale or legacy.
Facts
The source is not on GitHub — an editor checks tests and license manually.
- Maturity
- M1 · Prototype
- License
- No license found
- Tests
- not found
- CI
- not found
- Formal verification
- not found
- FuseSoC
- not found
Source exists, but no tests were found. How maturity is assigned
Purpose
UARTFuseSoCVerilator
Boards
No one has confirmed a board run yet.
Add evidenceSources
- OpenCores UART16550 source · 2026-04-30
How to check it locally
- Try a synthesis smoke run with: FuseSoC, Verilator.
Scores and how they are computed
License, tests, CI, formal checks, documentation and activity come from the repository check. Usefulness and learning value are editorial estimates.
Quality26
Verification15
License15
Docs35
Integration35
Usefulness72
Beginner76
Professional21
Confidence20
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