Configurable soft RISC-V SoC from Efinix: 1 to 4 64-bit cores, optional SV39 MMU, L1 and L2 caches, DDR3, LPDDR4x and HyperRAM controller for Efinix FPGAs; licence not stated.
CPUs and computeNo license foundM1 · Prototype
Open HDL cores for FPGA. License, tests and activity checked on GitHub.
Configurable soft RISC-V SoC from Efinix: 1 to 4 64-bit cores, optional SV39 MMU, L1 and L2 caches, DDR3, LPDDR4x and HyperRAM controller for Efinix FPGAs; licence not stated.
CPUs and computeNo license foundM1 · Prototype