LiteX
Python-based FPGA SoC builder for cores, buses, soft CPUs, and board targets.
LiteX is useful for learning and research SoC projects on FPGA targets.
The card links to the official enjoy-digital/litex repository.
Python-based FPGA SoC builder for cores, buses, soft CPUs, and board targets.
LiteX is useful for learning and research SoC projects on FPGA targets.
The card links to the official enjoy-digital/litex repository.
Suite of SystemVerilog developer tools: parser, formatter, linter, and syntax tooling.
Extensible waveform viewer for VCD/FST/GHW debug, available as native and web apps.
Universal FPGA programming utility for Xilinx, Altera/Intel, Lattice, Gowin, Efinix, Anlogic, and Cologne Chip.