Compare boards
Up to four boards side by side: chip, logic, toolchains, interfaces and price.
| Attribute | DE10-Lite | Tang Nano 20K | Nexys A7 | Arty A7 |
|---|---|---|---|---|
| FPGA | 10M50DAF484C7G | GW2AR-LV18QN88C8/I7 | XC7A100T-1CSG324C | XC7A35TICSG324-1L |
| Family | MAX 10 | GW2AR | Artix-7 | Artix-7 |
| Logic (LUTs) | not listed | 20736 | not listed | not listed |
| Price | at the seller | 28.17 USD | at the seller | at the seller |
| Open toolchain | no | Project Apicula | Project X-Ray / openXC7 | Project X-Ray / openXC7 |
| Toolchains | Intel Quartus Prime | Gowin EDA, Yosys + nextpnr-gowin + Apicula | Vivado WebPACK / ML Standard | Vivado WebPACK / ML Standard |
| Interfaces | VGA, USB-Blaster | HDMI, MAX98357A I2S amplifier path, TF card slot, USB Type-C, Onboard BL616 JTAG, USB UART | Ethernet, VGA, USB | Ethernet, USB UART, USB-JTAG |
| Memory | SDRAM requires Terasic manual verification | 32-bit SDR SDRAM 64 Mbit, Onboard flash 64 Mbit | DDR2 requires verification from Digilent resource center | DDR3 variant-specific; verify in Digilent memory tab |
| Level | Beginner | Beginner | Beginner | Beginner |
| Where to get help | Terasic support | Sipeed forum, r/GowinFPGA | Digilent Forum | Digilent Forum |
| Known issues | — | Onboard debugger recognition; Flash persistence mode | — | 35T and 100T variants differ |