Compare boards
Up to four boards side by side: chip, logic, toolchains, interfaces and price.
| Attribute | DE10-Lite | Tang Nano 9K | Tang Nano 20K | Arty A7 |
|---|---|---|---|---|
| FPGA | 10M50DAF484C7G | GW1NR-LV9QN88PC6/I5 | GW2AR-LV18QN88C8/I7 | XC7A35TICSG324-1L |
| Family | MAX 10 | GW1NR | GW2AR | Artix-7 |
| Logic (LUTs) | not listed | 8640 | 20736 | not listed |
| Price | at the seller | 14.5 USD | 28.17 USD | at the seller |
| Open toolchain | no | Project Apicula | Project Apicula | Project X-Ray / openXC7 |
| Toolchains | Intel Quartus Prime | Gowin EDA, Yosys + nextpnr-gowin + Apicula | Gowin EDA, Yosys + nextpnr-gowin + Apicula | Vivado WebPACK / ML Standard |
| Interfaces | VGA, USB-Blaster | HDMI, USB Type-C, Onboard JTAG, USB UART | HDMI, MAX98357A I2S amplifier path, TF card slot, USB Type-C, Onboard BL616 JTAG, USB UART | Ethernet, USB UART, USB-JTAG |
| Memory | SDRAM requires Terasic manual verification | PSRAM 64 Mbit, Onboard flash 32 Mbit | 32-bit SDR SDRAM 64 Mbit, Onboard flash 64 Mbit | DDR3 variant-specific; verify in Digilent memory tab |
| Level | Beginner | Beginner | Beginner | Beginner |
| Where to get help | Terasic support | r/GowinFPGA | Sipeed forum, r/GowinFPGA | Digilent Forum |
| Known issues | — | Open-source flow is feature-dependent | Onboard debugger recognition; Flash persistence mode | 35T and 100T variants differ |