Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeBOOMVexiiRiscvSERV
MaturityM1 · PrototypeM2 · Simulation-testedM4 · Production-ready
LicenseBSD-3-Clause · Commercial-friendlyMIT · Commercial-friendlyISC · Commercial-friendly
Language—SpinalHDL (Scala)Verilog
Tests—yesyes
CIyesyesyes
Formal———
FuseSoC——yes
Activityupdated 26 days agoupdated 1 day agoupdated 43 days ago
Boards———
Interfaces—AXI4, Wishbone, Tilelink, AXI4, Wishbone, Tilelink—
CategoryCPUs and computeCPUs and computeCPUs and compute

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