Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributefifoLiteSDCardLiteDRAMwb_ram
MaturityM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-testedM1 · Prototype
LicenseNo license foundNo license foundNo license foundNo license found
Language—Migen/Python/VerilogMigen/Python/Verilog—
Testsyesyesyes—
CI—yesyes—
Formal————
FuseSoCyes———
Activityupdated 6 years agoupdated 1 day agoupdated 1 day ago—
Boards————
InterfacesFIFO/stream, MemorySD/SDIOMemoryMemory, Wishbone
CategoryMemory and storageMemory and storageMemory and storageMemory and storage