Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributefifoLiteSDCardwb_ramLiteDRAM
MaturityM2 · Simulation-testedM2 · Simulation-testedM1 · PrototypeM2 · Simulation-tested
LicenseNo license foundNo license foundNo license foundNo license found
Language—Migen/Python/Verilog—Migen/Python/Verilog
Testsyesyes—yes
CI—yes—yes
Formal————
FuseSoCyes———
Activityupdated 6 years agoupdated 1 day ago—updated 1 day ago
Boards————
InterfacesFIFO/stream, MemorySD/SDIOMemory, WishboneMemory
CategoryMemory and storageMemory and storageMemory and storageMemory and storage