Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributefifowb_ramLiteSDCardLiteDRAM
MaturityM2 · Simulation-testedM1 · PrototypeM2 · Simulation-testedM2 · Simulation-tested
LicenseNo license foundNo license foundNo license foundNo license found
Language——Migen/Python/VerilogMigen/Python/Verilog
Testsyes—yesyes
CI——yesyes
Formal————
FuseSoCyes———
Activityupdated 6 years ago—updated 1 day agoupdated 1 day ago
Boards————
InterfacesFIFO/stream, MemoryMemory, WishboneSD/SDIOMemory
CategoryMemory and storageMemory and storageMemory and storageMemory and storage