Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeLiteJESD204Bopencores cordicopencores fft
MaturityM2 · Simulation-testedM1 · PrototypeM1 · Prototype
LicenseNo license foundNo license foundNo license found
Language—Verilog/VHDL unknown until reviewVerilog/VHDL unknown until review
Testsyes——
CIyes——
Formal———
FuseSoC———
Activityupdated 13 days ago——
Boards———
Interfaces———
CategoryDSP and radioDSP and radioDSP and radio

From the same category