Compare cores
Up to four cores side by side: maturity, license, tests and activity.
| Attribute | opencores can core | LiteSPI |
|---|---|---|
| Maturity | M1 · Prototype | M2 · Simulation-tested |
| License | No license found | BSD-2-Clause · Commercial-friendly |
| Language | Verilog/VHDL unknown until review | Migen/Python/Verilog |
| Tests | — | yes |
| CI | — | yes |
| Formal | — | — |
| FuseSoC | — | — |
| Activity | — | updated 13 days ago |
| Boards | — | — |
| Interfaces | — | SPI/QSPI |
| Category | Interfaces and peripherals | Interfaces and peripherals |