Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributeopencores minsocVexRiscvNEORV32
MaturityM1 · PrototypeM2 · Simulation-testedM4 · Production-ready
LicenseNo license foundMIT · Commercial-friendlyBSD-3-Clause · Commercial-friendly
LanguageVerilog/VHDL unknown until reviewSpinalHDL/Scala/VerilogVHDL
Tests—yesyes
CI—yesyes
Formal———
FuseSoC———
Activity—updated 10 days agoupdated 3 days ago
Boards———
Interfaces———
CategoryCPUs and computeCPUs and computeCPUs and compute

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