Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributewb_ramLiteSATALiteSDCardLiteDRAM
MaturityM1 · PrototypeM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseNo license foundNo license foundNo license foundNo license found
Language—Migen/Python/VerilogMigen/Python/VerilogMigen/Python/Verilog
Tests—yesyesyes
CI—yesyesyes
Formal————
FuseSoC————
Activity—updated 9 days agoupdated 1 day agoupdated 1 day ago
Boards————
InterfacesMemory, WishboneSATASD/SDIOMemory
CategoryMemory and storageMemory and storageMemory and storageMemory and storage