Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeZipCPUSERVVexRiscv
MaturityM2 · Simulation-testedM4 · Production-readyM2 · Simulation-tested
LicenseNo license foundISC · Commercial-friendlyMIT · Commercial-friendly
LanguageVerilogVerilogSpinalHDL/Scala/Verilog
Testsyesyesyes
CI—yesyes
Formalyes——
FuseSoC—yes—
Activityupdated 21 days agoupdated 43 days agoupdated 10 days ago
Boards———
InterfacesWishbone——
CategoryCPUs and computeCPUs and computeCPUs and compute

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