Manual review is required.
Ibex
Small open RISC-V CPU used by OpenTitan.
CPUs and computeSystemVerilogApache-2.0M2 · Simulation-testedupdated 5 days ago
Worth knowing
Facts
From GitHub data, checked October 6, 2026.
- Maturity
- M2 · Simulation-tested
- License
- Apache-2.0 · Commercial-friendly
- Tests
- yes
- CI
- yes
- Formal verification
- yes
- FuseSoC
- yes
- Last commit
- updated 5 days ago
- Stars
- 2078
The repository contains tests or a testbench. How maturity is assigned
Purpose
Verilator
Boards
No one has confirmed a board run yet.
Add evidenceSources
- Ibex source · 2026-04-30
How to check it locally
- Run the upstream simulation/test command from the repository README or CI workflow.
- Inspect the upstream FuseSoC .core manifest and use it as the integration entrypoint.
- Try a synthesis smoke run with: Verilator.
Scores and how they are computed
License, tests, CI, formal checks, documentation and activity come from the repository check. Usefulness and learning value are editorial estimates.
Quality84
Verification85
License90
Docs70
Integration55
Usefulness72
Beginner42
Professional85
Confidence40
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