NeuroRing - FPGA spiking neural network accelerator
NeuroRing is an open-source project for a scalable spiking neural network accelerator for FPGA-based systems. The repository lists Verilog sources, high-level synthesis code, Python host code, configuration files, and an Apache-2.0 license.
Overview
NeuroRing is a repository for a scalable spiking neural network accelerator project for FPGA-based systems. This page is based on the repository page and LICENSE file checked on 2026-05-15.
Repository contents
The README describes aurora_ipcore as Aurora IP core sources for FPGA-to-FPGA communication over a QSFP port.
The conf folder is described as build and configuration files used to generate the FPGA bitstream, including kernel definitions and connectivity.
The hls folder contains high-level synthesis source code for accelerator kernels.
The host_py folder contains Python host code used to control and interact with the FPGA kernels.
Why it matters for FPGA engineers
The repository is useful as a compact reference for an accelerator structure that combines high-level synthesis code, communication IP, and host-side control. Before reuse, verify the target board, tool versions, Aurora settings, and timing constraints.
Practical note
Pin down the device, board, tool versions, Aurora parameters, and constraints before synthesis. Neural spikes are short; debug cycles rarely are.
Official links
Evidence
Repository: https://github.com/ihsanalhafiz/NeuroRing. Checked: 2026-05-15.
Apache-2.0 license file: https://github.com/ihsanalhafiz/NeuroRing/blob/main/LICENSE. Checked: 2026-05-15.