Compare boards
Up to four boards side by side: chip, logic, toolchains, interfaces and price.
| Attribute | DE10-Nano | Arty A7 | Tang Nano 20K |
|---|---|---|---|
| FPGA | 5CSEBA6U23I7 | XC7A35TICSG324-1L | GW2AR-LV18QN88C8/I7 |
| Family | Cyclone V SoC | Artix-7 | GW2AR |
| Logic (LUTs) | not listed | not listed | 20736 |
| Price | at the seller | at the seller | 28.17 USD |
| Open toolchain | Mistral | Project X-Ray / openXC7 | Project Apicula |
| Toolchains | Intel Quartus Prime | Vivado WebPACK / ML Standard | Gowin EDA, Yosys + nextpnr-gowin + Apicula |
| Interfaces | HDMI TX, Ethernet, USB | Ethernet, USB UART, USB-JTAG | HDMI, MAX98357A I2S amplifier path, TF card slot, USB Type-C, Onboard BL616 JTAG, USB UART |
| Memory | HPS DDR3 requires Terasic manual verification | DDR3 variant-specific; verify in Digilent memory tab | 32-bit SDR SDRAM 64 Mbit, Onboard flash 64 Mbit |
| Level | Intermediate | Beginner | Beginner |
| Where to get help | Terasic support | Digilent Forum | Sipeed forum, r/GowinFPGA |
| Known issues | — | 35T and 100T variants differ | Onboard debugger recognition; Flash persistence mode |