Compare boards
Up to four boards side by side: chip, logic, toolchains, interfaces and price.
| Attribute | DE10-Nano | Tang Nano 9K | Tang Nano 20K |
|---|---|---|---|
| FPGA | 5CSEBA6U23I7 | GW1NR-LV9QN88PC6/I5 | GW2AR-LV18QN88C8/I7 |
| Family | Cyclone V SoC | GW1NR | GW2AR |
| Logic (LUTs) | not listed | 8640 | 20736 |
| Price | at the seller | 14.5 USD | 28.17 USD |
| Open toolchain | Mistral | Project Apicula | Project Apicula |
| Toolchains | Intel Quartus Prime | Gowin EDA, Yosys + nextpnr-gowin + Apicula | Gowin EDA, Yosys + nextpnr-gowin + Apicula |
| Interfaces | HDMI TX, Ethernet, USB | HDMI, USB Type-C, Onboard JTAG, USB UART | HDMI, MAX98357A I2S amplifier path, TF card slot, USB Type-C, Onboard BL616 JTAG, USB UART |
| Memory | HPS DDR3 requires Terasic manual verification | PSRAM 64 Mbit, Onboard flash 32 Mbit | 32-bit SDR SDRAM 64 Mbit, Onboard flash 64 Mbit |
| Level | Intermediate | Beginner | Beginner |
| Where to get help | Terasic support | r/GowinFPGA | Sipeed forum, r/GowinFPGA |
| Known issues | — | Open-source flow is feature-dependent | Onboard debugger recognition; Flash persistence mode |