Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributefifoLiteDRAMLiteSATA
MaturityM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseNo license foundNo license foundNo license found
Language—Migen/Python/VerilogMigen/Python/Verilog
Testsyesyesyes
CI—yesyes
Formal———
FuseSoCyes——
Activityupdated 6 years agoupdated 1 day agoupdated 9 days ago
Boards———
InterfacesFIFO/stream, MemoryMemorySATA
CategoryMemory and storageMemory and storageMemory and storage

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