Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeLiteJESD204Bopencores fftopencores cordicOpenCores WDSP
MaturityM2 · Simulation-testedM1 · PrototypeM1 · PrototypeM1 · Prototype
LicenseNo license foundNo license foundNo license foundLGPL · Copyleft
Language—Verilog/VHDL unknown until reviewVerilog/VHDL unknown until reviewVHDL
Testsyes———
CIyes———
Formal————
FuseSoC————
Activityupdated 13 days ago———
Boards————
Interfaces———Wishbone
CategoryDSP and radioDSP and radioDSP and radioDSP and radio