Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeLiteJESD204BOpenCores WDSPopencores cordicopencores fft
MaturityM2 · Simulation-testedM1 · PrototypeM1 · PrototypeM1 · Prototype
LicenseNo license foundLGPL · CopyleftNo license foundNo license found
Language—VHDLVerilog/VHDL unknown until reviewVerilog/VHDL unknown until review
Testsyes———
CIyes———
Formal————
FuseSoC————
Activityupdated 13 days ago———
Boards————
Interfaces—Wishbone——
CategoryDSP and radioDSP and radioDSP and radioDSP and radio