Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributeopencores cordicLiteJESD204Bopencores fftOpenCores WDSP
MaturityM1 · PrototypeM2 · Simulation-testedM1 · PrototypeM1 · Prototype
LicenseNo license foundNo license foundNo license foundLGPL · Copyleft
LanguageVerilog/VHDL unknown until review—Verilog/VHDL unknown until reviewVHDL
Tests—yes——
CI—yes——
Formal————
FuseSoC————
Activity—updated 13 days ago——
Boards————
Interfaces———Wishbone
CategoryDSP and radioDSP and radioDSP and radioDSP and radio