Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributeopencores fftopencores cordicLiteJESD204BOpenCores WDSP
MaturityM1 · PrototypeM1 · PrototypeM2 · Simulation-testedM1 · Prototype
LicenseNo license foundNo license foundNo license foundLGPL · Copyleft
LanguageVerilog/VHDL unknown until reviewVerilog/VHDL unknown until review—VHDL
Tests——yes—
CI——yes—
Formal————
FuseSoC————
Activity——updated 13 days ago—
Boards————
Interfaces———Wishbone
CategoryDSP and radioDSP and radioDSP and radioDSP and radio