Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributeopencores fftOpenCores WDSPLiteJESD204Bopencores cordic
MaturityM1 · PrototypeM1 · PrototypeM2 · Simulation-testedM1 · Prototype
LicenseNo license foundLGPL · CopyleftNo license foundNo license found
LanguageVerilog/VHDL unknown until reviewVHDL—Verilog/VHDL unknown until review
Tests——yes—
CI——yes—
Formal————
FuseSoC————
Activity——updated 13 days ago—
Boards————
Interfaces—Wishbone——
CategoryDSP and radioDSP and radioDSP and radioDSP and radio