Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributeopencores minsocSERVIbex
MaturityM1 · PrototypeM4 · Production-readyM2 · Simulation-tested
LicenseNo license foundISC · Commercial-friendlyApache-2.0 · Commercial-friendly
LanguageVerilog/VHDL unknown until reviewVerilogSystemVerilog
Tests—yesyes
CI—yesyes
Formal——yes
FuseSoC—yesyes
Activity—updated 43 days agoupdated 1 day ago
Boards———
Interfaces———
CategoryCPUs and computeCPUs and computeCPUs and compute

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