Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributeopencores minsocVexRiscvBlackParrot
MaturityM1 · PrototypeM2 · Simulation-testedM2 · Simulation-tested
LicenseNo license foundMIT · Commercial-friendlyBSD-3-Clause · Commercial-friendly
LanguageVerilog/VHDL unknown until reviewSpinalHDL/Scala/Verilog—
Tests—yesyes
CI—yesyes
Formal——yes
FuseSoC———
Activity—updated 10 days agoupdated 1 day ago
Boards———
Interfaces———
CategoryCPUs and computeCPUs and computeCPUs and compute

From the same category