Compare cores
Up to four cores side by side: maturity, license, tests and activity.
| Attribute | OpenCores WDSP | LiteJESD204B | opencores cordic |
|---|---|---|---|
| Maturity | M1 · Prototype | M2 · Simulation-tested | M1 · Prototype |
| License | LGPL · Copyleft | No license found | No license found |
| Language | VHDL | — | Verilog/VHDL unknown until review |
| Tests | — | yes | — |
| CI | — | yes | — |
| Formal | — | — | — |
| FuseSoC | — | — | — |
| Activity | — | updated 13 days ago | — |
| Boards | — | — | — |
| Interfaces | Wishbone | — | — |
| Category | DSP and radio | DSP and radio | DSP and radio |