Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeIObundle cachefifoLiteSDCardLiteSATA
MaturityM1 · PrototypeM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseCERN-OHL-S-2.0 · CopyleftNo license foundNo license foundNo license found
Language——Migen/Python/VerilogMigen/Python/Verilog
Tests—yesyesyes
CIyes—yesyes
Formal————
FuseSoC—yes——
Activityupdated 16 days agoupdated 6 years agoupdated 1 day agoupdated 9 days ago
Boards————
InterfacesMemoryFIFO/stream, MemorySD/SDIOSATA
CategoryMemory and storageMemory and storageMemory and storageMemory and storage