Compare cores

Up to four cores side by side: maturity, license, tests and activity.

Attributeopencores minsocIbexVexRiscvBlackParrot
MaturityM1 · PrototypeM2 · Simulation-testedM2 · Simulation-testedM2 · Simulation-tested
LicenseNo license foundApache-2.0 · Commercial-friendlyMIT · Commercial-friendlyBSD-3-Clause · Commercial-friendly
LanguageVerilog/VHDL unknown until reviewSystemVerilogSpinalHDL/Scala/Verilog—
Tests—yesyesyes
CI—yesyesyes
Formal—yes—yes
FuseSoC—yes——
Activity—updated 1 day agoupdated 10 days agoupdated 1 day ago
Boards————
Interfaces————
CategoryCPUs and computeCPUs and computeCPUs and computeCPUs and compute